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Sheet目录3887

119页 120页 121页 122页 [123页]124页 125页 126页 127页

PIC16C5X

DS30453D-page 32

Preliminary

2002 Microchip Technology Inc.

6.5.1

PAGING CONSIDERATIONS –

PIC16C56/CR56, PIC16C57/CR57

AND PIC16C58/CR58

If the Program Counter is pointing to the last address of

a selected memory page, when it increments it will

cause the program to continue in the next higher page.

However, the page preselect bits in the STATUS Reg-

ister will not be updated. Therefore, the next GOTO,

CALL

or modify PCL instruction will send the program

to the page specified by the page preselect bits (PA0 or

PA<1:0>).

For example, a NOP at location 1FFh (page 0) incre-

ments the PC to 200h (page 1). A GOTO xxx at 200h

will return the program to address xxh on page 0

(assuming that PA<1:0> are clear).

To prevent this, the page preselect bits must be

updated under program control.

6.5.2

EFFECTS OF RESET

The Program Counter is set upon a RESET, which

means that the PC addresses the last location in the

last page (i.e., the RESET vector).

The STATUS Register page preselect bits are cleared

upon a RESET, which means that page 0 is pre-

selected.

Therefore, upon a RESET, a GOTO instruction at the

RESET vector location will automatically cause the pro-

gram to jump to page 0.

6.6

Stack

PIC16C5X devices have a 10-bit or 11-bit wide, two-

level hardware push/pop stack.

A CALL instruction will push the current value of stack

1 into stack 2 and then push the current program

counter value, incremented by one, into stack level 1. If

more than two sequential CALL’s are executed, only

the most recent two return addresses are stored.

A RETLW instruction will pop the contents of stack level

1 into the program counter and then copy stack level 2

contents into level 1. If more than two sequential

RETLW

’s are executed, the stack will be filled with the

address previously stored in level 2. Note that the

W Register will be loaded with the literal value specified

in the instruction. This is particularly useful for the

implementation of data look-up tables within the pro-

gram memory.

For the RETLW instruction, the PC is loaded with the

Top of Stack (TOS) contents. All of the devices covered

in this data sheet have a two-level stack. The stack has

the same bit width as the device PC, therefore, paging

is not an issue when returning from a subroutine.

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